Combining Parallel and Vector

SIMD packs many values into one core's instruction. Threads spread work across cores. Stacking both gives you the most. ⚡

Use parallelize on the outer level so each core owns a chunk of the data. That is the coarse split across cores.

Inside each chunk, use vectorize so one core chews through its slice in SIMD packs. That is the fine split per core.

Both tools live in the algorithm module, so you can bring them in together and combine them in one function.

Each chunk worker computes its start and end, then hands its own slice to vectorize for the SIMD sweep.

Within the worker, call vectorize on just this chunk's length. The SIMD width sets how many lanes run at once.

The inner step gets a local index, so add the chunk start to reach the right spot in the full array.

Match the vector width to your hardware lanes with simdwidthof so each core uses its registers fully.

The win multiplies: many cores, each doing many lanes per step. That product is why combined code is so fast.

This stacking only works because chunks never touch each other's data. Independence keeps the two layers safe.

Benchmark scalar, vector-only, and combined versions. The numbers reveal how much each layer contributes.

You combine threads and SIMD on the same workload.

You wrap parallelize over chunks and call vectorize inside each, offsetting by the chunk start, so cores times lanes multiply your throughput. 🚀