The Programmable Interrupt Controller (PIC) and APIC
Discover how hardware interrupt requests reach the CPU through the 8259 PIC and the modern APIC, including IRQ remapping, masking, and end-of-interrupt signaling.
Why a Controller Is Needed
The CPU has only a single hardware interrupt pin (INTR), yet a PC has dozens of devices that need attention. A dedicated chip multiplexes these IRQ lines onto that one pin and tells the CPU which device fired.
That chip is the Programmable Interrupt Controller (PIC).
The Legacy 8259 PIC
The classic PC uses two cascaded 8259A chips, giving 15 usable IRQ lines (IRQ0-IRQ15). The master handles IRQ0-7, the slave IRQ8-15 connected through IRQ2.
- IRQ0 = system timer
- IRQ1 = keyboard
- IRQ14/15 = ATA disks
All lessons in this course
- Understanding Interrupts and Traps
- Interrupt Descriptor Table (IDT)
- Custom Exception Handlers
- The Programmable Interrupt Controller (PIC) and APIC